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--- software:linux:jtag [2013/05/19 01:18] – [Intermezzo: JTAG clk signal integrity observations] admin
+++ software:linux:jtag [2015/10/11 20:03] (current) – [TIAO USB Multi Protocol adapter JTAG] admin
@@ Line 312: / Line 312: @@
 Unfortunately the output of this shows no success as it does at the OpenMoko board:
   Found Generic flash chip "unknown SPI chip (RDID)" (0 kB, SPI).
-Instead SPI2 at the TIAO tumpa board which is mapped to port B works better. Connections are:
+Instead use SPI2 at the TIAO tumpa board, which is mapped to port B. This works fine. Connections are:
-(SPI2->EEPROM)
+^ SPI2 ^ EEPROM ^
-  * MISO->DO
+| MISO  | DO  |
-  * VCC ->VCC+/HOLD+/WP
+| VCC  | VCC+/HOLD+/WP  |
-  * SCK ->CLK
+| SCK  | CLK  |
-  * MOSI->DI
+| MOSI  | DI  |
-  * CS  ->/CS
+| CS  | /CS  |
-  * GND ->GND
+| GND  | GND  |
 | {{ http://www.auditeon.com/xyz/auditeon/20130317_213801.IMG_0723.1024x796.jpg?385x300 |TIAO adapter with flash eeprom}} |
@@ Line 402: / Line 402: @@
 ^ {{ http://www.auditeon.com/xyz/auditeon/10.RS_90.RL_OO.flashrom_jtag_clk.JPG?372x300 |RS=105, RL=∞}} ^
 |  Real clk signal\\ RS=105 Ohm\\ No termination\\ JTAG cable length: 20cm  |
-The buffer is causing a delay of about 6ns for the CLK signal.
+The LVC16T245 buffer is causing a delay of about 6ns for the CLK signal.
 ===== Links and information =====
   * [[http://blog.csdn.net/imalex/article/details/6719614]]

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